I/O interfacing circuits –Hand shaking,serial and parallel interfacing – Address decoding Interfacing chips Programmable peripheral interfacing. In this presentation we get to know about keyboard Features, Cpu interface pins, Key board Data, Display data, Timing and control. Intel Programmable Key Board/Display Interface is available in the The description of pins of Programmable keyboard/display interface is given.

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DD Function 00 8-digit display with left entry 01 digit display with left entry 10 8-digit display with right entry 11 digit display with right entry.

Interrupt request, becomes 1 when a key is pressed, data is available.

Used for controlling real-time events such as real-time clock, events counter, and motor speed and direction control. DD field selects either: This mode is further classified into two output modes. This mode deals with the input given by the keyboard and this mode is further classified into 3 modes. These are the scan lines used to scan the keyboard matrix and display the digits.

Minimum count is 1 all modes except 2 and 3 with minimum count of 2. This unit first scans the key closure row-wise, if found then the keyboard debounce unit debounces the key entry. RL pins incorporate internal pull-ups, no need for external resistor pull-ups. Provides kwyboard timing source to the internal speaker and other devices.


Microprocessor – Programmable Keyboard

The keyboard first scans the keyboard and identifies if any key has been pressed. Programs internal clk, sets scan and debounce times. To determine if a character has been typed, the FIFO status register is checked. It has an internal pull up.

SL outputs are active-low only one low at any time. Pinout Definition A0: Interface of WWBB The display write inhibit control word inhibits writing to either the leftmost 4 bits keyboad the display left W or rightmost 4 bits.

Unlike the 82C55, the must be programmed first. Selects type of display read and address of the read. Return lines are inputs used to sense key depression in the keyboard matrix. Interface of 2 Keyboard type is programmed next. This is when the overrun status is set.

8279 – Programmable Keyboard

Interface of Code given in text for reading keyboard. An events counter enabled with G.

It has two modes i. The address inputs select one of the four internal registers with the as follows: Causes DRAM memory system to be refreshed.

Generates a basic timer interrupt that occurs at approximately Scan line outputs scan both the keyboard and displays. Allows half-bytes to be blanked. Z selects auto-increment for the address. DD Function Encoded keyboard with 2-key lockout Decoded keyboard with 2-key lockout Encoded keyboard with N-key rollover Decoded keyboard with N-key rollover Encoded sensor matrix Decoded sensor matrix Strobed keyboard, encoded display scan Strobed keyboard, decoded display scan Encoded: Six Digit Display Interface of Each counter has a program control word used to select the way the counter operates.


Pins SL2-SL0 sequentially scan each column through a counting operation. If more than 8 characters are entered in the FIFO, then it means more than eight keys are pressed at a time. This mode deals with display-related operations.

Clears the IRQ signal to the microprocessor.

The display is controlled from an internal 16×8 RAM that stores the coded display information. These are the output ports for two 16×4 or one 16×8 internal display refresh registers. In the scanned sensor matrix mode, this unit acts as sensor RAM where its each row is loaded with the status of their corresponding row of sensors into the matrix. In the Polled modethe CPU periodically reads an internal flag of to check whether any key is pressed or not with key pressure.

The first 3 bits of sent to control port selects one of 8 control words. The timing and control unit handles the timings for the operation of the circuit.

Its data buffer interfaces the external bus of the system with the internal bus of the microprocessor. Encoded keyboard with N-key rollover.